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BSc.CSIT 1st Semester Old Questions

Subject: Digital Logic

BSc.CSIT 1st Semester Digital Logic

BSc.CSIT 1st Semester Digital Logic Question Year : 2065

Long Questions:
Attempt any two questions: (2 × 10=20)

1. Draw a block diagram, truth table and logical circuit of a 16 x 1 multiplexer and explain
   its working principle.
2. Explain the 4-bit ripple counter and also draw a timing diagram.
3. Design the full subtract or circuit with using Decoder and explain the working
   principle.
   Short Questions:
   Attempt any eight questions: (8 × 5=40)
4. Design a half adder logic circuit using only NOR gate.
5. Convert the following decimal numbers into hexadecimal and octal number.

(a) 304
(b)224

6. Describe the three-variable K-map with example.
7. Design the Decoder using Universal gates.
8. What is combinational logic? What are its important features?
9. Describe the clocked RS flip-flop.
   10.What do you mean by triggering of flip-flop?
10. What are the shift Register operations?
11. Describe the Ripple counter.
12. Write short notes on:
    (a) Registers.
    (b)Digital.
    (c) EBCDIC.

Year : 2066 BSc.CSIT 1st Semester Digital Logic Old Question

Long Questions:
Attempt any two questions: (2 × 10=20)

1. Design the 4-bit synchronous up/down counter with timing diagram, logic diagram
   and truth table.
2. Design a full subtractor with truth table and logic gates.
3. Design a decimal adder with logical diagram and truth table.
   Short Questions:
   Attempt any eight questions: (8 × 5=40)
4. Differentiate between Analog and Digital system.
5. Convert the following octal numbers to hexadecimal.
   a. 1760.46
   b. 6055.263
6. Which gates can be used as inverts in additional to the NOT gate and how?
7. Draw a logic gates that implements the following
   a) A = (Y1 ⊕ Y2) (Y3 ⊙ Y4

) + (Y5 ⊕ Y6 ⊕ Y7
)

b) A = (X1 ⊙ X2

) + (X3 ⊙ X4

) + ( X4 ⊙ X5

)⨁(X4 ⊙ X7
)

8. State and prove De-Morgan’s theorem 1st and 2nd with logic gates and truth table.
9. Reduce the following expressions using K-map

̅A + B(A + B + D)(B + C)(B + C + D)

10.Differentiate between a MUX and a DEMUX.

11. Explain the operation of Decoder.
12. What are the various types of shift registers?
13. What do you mean by Synchronous counter?

Year: 2067 Old Question of BSc.CSIT 1st Semester Digital Logic

Long Questions:
Attempt any two questions: (2 × 10=20)

1. What is magnitude comparator? Design a logic circuit for a 4-bit magnitude
   comparator and explain it.
2. What do you mean by full adder and full subtractor? Design a 3 to 8 line decoder using
   two 2 to 4 line decoder and explain it.
3. What is JK master slave flip-flop? Design its logic circuit, truth table and explain the
   working principle.
   Short Questions:
   Attempt any eight questions: (8 × 5=40)
4. Convert the following hexadecimal number to decimal and octal numbers
   a. 0FFF
   b. 3FFF
5. Design a half adder logic circuit using NOR gates only.
6. Proof the 1st and 2nd law of De Morgan’s theorems with logic gate and truth table.
7. What do you mean by universal gate? Realize the following logic gates using NOR
   gates.
   a. OR gate
   b. AND gate
8. Draw a logic circuit of 4×1 multiplexer.
9. What is a flip-flop? Mention the application of flip-flop.
   10.Explain the Ripple Counter.
10. Design the Decimal Adder.
11. What do you mean by shift registers? Explain.
12. Write short notes on (any two):
    a. Decoder
    b. Integrated circuit
    c. PLA.

Year : 2068 Question of BSc.CSIT 1st Semester Digital Logic

Long Questions:
Attempt any two questions: (2 × 10=20)

1. Draw a block diagram truth table and logic circuit of 1*16 Demultiplexer and explain
   its working principle.
2. Design a 3 bit synchronous counter and explain it.
3. What is magnitude comparator? Design a logic circuit for 4 bit comparator and explain
   it.
   Short Questions:
   Attempt any eight questions: (8 × 5=40)
4. Design a half subtractor circuit using only NAND gates.
5. Convert the following decimal numbers into Hexadecimal and Octal numbers:
6. 504
7. 250
8. Design an encoder using universal gates.
9. What do you mean by D-flip-flop?
   10.What is sequential logic? What are the important features?
10. Simplify the Boolean function using K-Maps.
11. F = X’yz + X’yz’ +Xy’z’ +Xy’z
12. Draw a parallel-parallel-out shift register and explain it.
    14.Explain the 4 bit ripple counter.
13. Explain the programmable logic array.
    16.Write short notes on :
    a. Asynchronous counter
    b. Multiplexers
    c. State reduction table

BSc.CSIT 1st Semester Digital Logic Question Year : 2069

Long Questions:
Attempt any two questions: (2 × 10=20)

1. What is decoder? Implement the following using decoder.
   a. F (W X Y Z) = Σ (0,1,3,4,8,9,10)
   b. F (W X Y Z) = Σ (1,3,5,6,11,13,14)
2. What do you mean by asynchronous counter? Design a mod-6 synchronous counter
   using T flip-flops.
3. Explain the Master-slave S-R flip-flop with logic diagram, truth table and timing
   diagram.
   Short Questions:
   Attempt any eight questions: (8 × 5=40)
4. Design a half subtractor using only NOR gates.
5. Convert the following decimal numbers into hexadecimal and octal number.
   a. 220
   b. 1020
6. Design a multiplexer 4*1 using only universal gates.
7. What is J-K flip flop? Explain.
8. Write a procedure to reduce K-maps.
9. What are the various types of shift registers?
   10.Draw a logic diagram of a 4 bit ripple counter using D-flip flop.
10. Differentiate between combinational logic and sequential logic. List some
    applications of sequential logic.
11. Explain the decimal adder.
12. Write short notes on :
    a. Programmable Logic Array
    b. Triggering at flip-flop
    c. Memory Unit

Year : 2070 BSc.CSIT 1st Semester Digital Logic Questions

Long Questions:
Attempt any two questions: (2 × 10=20)

1. Design Magnitude comparator and also design a logic diagram for a 4 bit magnitude
   comparator.
2. What do you mean by ripple counters? Explain with timing diagram.
3. Explain the full subtractor with using decoder.
   Short Questions:
   Attempt any eight questions: (8 × 5=40)
4. Design a half adder logic using only NAND gates.
5. Convert the following decimal number into hexadecimal and octal.
   a. 334
   b. 225
6. Explain the K-map with three variables.
7. Explain the combination logic with examples.
8. Differentiate between Multiplexer and demultiplexer.
9. Mention the difference types of shift register.
   10.What do you mean by Ripple counters?
10. Explain the decoder and design with universal gates.
11. What do you mean by clocked RS flip-flop ?Explain
12. Write short note on (any two):
    a) Flip flop
    b) Synchronous Counter
    c) Digital systems.

Year : 2071 Old Question of BSc.CSIT 1st Semester Digital Logic

Long Questions:
Attempt any two questions: (2 × 10=20)

1. What are the various types of numbering system use in the digital logic? Explain.
   Convert the 3EC816 into different numbering system that you know.
2. Design the mod-6 asynchronous counter and explain with truth table.
3. What is demultiplexer? Draw its block diagram and explain its working principle.

Short Questions:
Attempt any eight questions: (8 × 5=40)

4. Convert the hexadecimal number 2BFC to binary and then to octal.
5. Proof the De-Morgan 1st and 2nd theorem with truth table and logic gates.
6. Simplify, the following Boolean function using three variable K-map.
   a) F(X,Y,Z) = ∑(0,3,2,5)
   b) F(A,B,C) = ∑(0,2,4,5,6)
7. Simplify the Boolean expression.
   Y = ̅A̅̅.̅B̅ + A
   ̅̅̅̅+̅̅ B̅

prepare truth table to show that the simplified expression is correct or not?

8. Explain the PLA (Programmable Logic Array).
9. How JK flip flop can convert into a D-flip flop?
10. What do you mean by synchronous counter? Explain with truth table.
11. Draw a 3 to 8 decoder circuit and explain its operation.
12. Mention the difference types of shift register and explain.
13. Write short notes on:-
    a) CMOS
    b) Universal gates
    c) Error detection code

Year: 2072 1st Semester BSc.CSIT Digital Logic Old Questions

Long Questions:
Attempt any two questions: (2 × 10=20)

1. Design and implement with logic diagram of synchronous 3 bit up down counter using
   J-K flip flop.
2. Design a magnitude comparator using logic gates and truth table.
3. Design a master-slave S-R flip flop with logic diagram and truth table.
   Short Questions:
   Attempt any eight questions: (8 × 5=40)
4. What do you mean by the Gray code? What are its application?
5. Covert the following:
   a) A08E. FA16 = (? )10
   b) AE9. BOE16 = (? )2
6. State and prove commutative laws, associative laws and distributive law using logic
   gate and truth table.
7. Show that both NAND gate and NOR gate are universal gates.
8. Prove that:
   a) ABC ̅̅̅̅̅̅ ((A + B + C)
   ̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅)=ABC
   b) A + B̅C(A + B̅ C
   ̅̅̅̅̅ = A
9. Reduce the following expression using K-map.
   a) (A+B)(A+B̅+C)(A+C̅)
   b) A+B(A+B̅+D)(B+C̅)(B+C+D)
10. How does a J-K flip flop differs from an S-R flip flop in its basic operations? Explain.
11. Differentiate between a counter a shift register.
12. Design a 4 input multiplexer using logic diagram and truth table.
13. Explain the serial-In, parallel out shift register.

Year: 2073 Old Questions of Digital Logic

Long Questions:
Attempt any two questions: (2 × 10=20)

1. Explain the magnitude comparator and also design a logic diagram for 4 bit magnitude
   comparator.
2. What do you mean by decoder? Design a 3 to 8 line decoder using 2 to 4 line decoder
   and explain it.
3. What do you mean by ripple counter? Explain the design procedure of sequential
   circuits.
   Short Questions:
   Attempt any eight questions: (8 × 5=40)
4. Convert the following hexadecimal number to decimal and octal numbers.
   a) 4FF
   b) 6FED
5. Explain the error detection code with example.
6. Explain the duality theorem with example.
7. Design half adder logic circuit using only universal gates.
8. Draw a logic circuit of 8*1 multiplexer.
9. Design the 4 bit parallel binary adder.
   10.Explain the PLA with the block diagram.
10. Explain the R-S flip flop with truth table.
11. Explain the shift register with example.
12. Write short note on (any two):
    a) Binary counter
    b) State reduction
    c) Negative edge triggering